1. Field of the Invention
The invention relates in general to the fabrication of a barrier layre, and more particularly to the fabrication of a barrier layer corresponding with a nitridation reaction.
2. Description of the Related Art
The increasing of the integrity of the integrated circuited (IC) causes the insufficiency of the chip surface for formation of interconnection. To satisfy the requirement of more wiring lines as the device size is shrinking, a design of multi-level interconnection is needed for IC fabrication. The multi-level interconnection is a three-dimensional wiring line structure . To form a multi-level interconnection structure, the first or lower layer of the metal wiring line is first formed, connecting with the source/drain region of the metal-oxide semiconductor transistor (MOS) on a substrate and the second layer of the metal wiring line is then formed, connecting with the first metal wiring line. The metal wiring lines can either be made from metal or any conductive material such as polysilicon. More than two layers of metal wiring lines can be formed if necessary.
Aluminum and tungsten are both widely used metal for metallization process of ICs. Aluminum is mainly used as wiring lines between devices due to its low resistivity and aluminum is mostly formed by magnetron DC sputtering. Tungsten is widely used for forming a plug to connect different layers of metal since it can be formed by chemical vapor deposition (CVD), easy to form fluoride compound with high volatility and without etching difficulties. However, spiking tends to occur at the junction of the aluminum and silicon. The solution of spiking is to form a barrier layer made from a conductive material between the aluminum layer and silicon. By forming the barrier layer, the adhesion force of tungsten to other material can be also improved. The barrier layer can be formed from TiN or TiW.
On the other hand, copper has been intensively studied as a new candidate for metal interconnects because of its lower electrical resistivity and better electromigration resistance than aluminum. However, for the successful application of copper metallization, fast diffusivity and high oxidation of copper must be solved. Although several metal nitirides and metal oxides have been investigated to improve these problems, they also increase the complex of metallization process and sheet resistance of copper interconnection line; thus, a stable copper metallization system was not easy to obtain.
Referring to FIG. 1A.about.1C, a conventional process for forming a barrier layer is shown. As shown in FIG. 1A, a semiconductor device 11 is first formed. Then, referring to FIG. 1B, an oxide layer 12 is deposited to cover the semiconductor device 11 by CVD. Then, by performing a photolithography process, an opening 13 is etched to formed at the oxide layer 12.
Next, referring to FIG. 1C, a barrier layer 14 is deposited to cover the periphery and the bottom of the opening 13. The material of the barrier layer 14 can be TiN. Next, a tungsten plug layer 15 is deposited by CVD to fill the opening 13 and to cover the barrier layer 14. A chemical mechanical polishing (CMP) process is then performed to polish the tungsten plug layer 15 until the surface of the oxide layer 12 is exposed and the upper surface of the tungsten plug is about at the same level as the upper surface of the oxide layer 12.